Engineered crystals could help computers run on less electricity

Researchers at the University of California, Berkeley have created engineered crystal structures that exhibit an unusual physical phenomenon known as negative capacitance. Integrating this material into advanced silicon transistors could make computers more energy efficient. (UC Berkeley image by Ella Maru Studio)

Computers are getting smaller and more powerful, but they require a lot of energy to function. The total amount of energy the US expends on computing has increased dramatically over the past decade and is fast approaching that of other key sectors such as transportation.

In a study published online in the journal this week Nature, University of California, Berkeley, engineers describe a major breakthrough in the design of a component made from transistors — the tiny electrical switches that make up the building blocks of computers — that could significantly reduce their power consumption without sacrificing speed, size, or performance. The component called the gate oxide plays a key role in turning the transistor on and off.

“We were able to show that our gate oxide technology is better than commercially available transistors: what the trillion-dollar semiconductor industry can do today — we can essentially beat it,” said study lead author Sayeef Salahuddin of the TSMC Distinguished Professor of Electrical Engineering and Computer Science at UC Berkeley.

This increase in efficiency is made possible by an effect called negative capacitance, which helps reduce the voltage required to store charge in a material. Salahuddin theoretically predicted the existence of negative capacitance in 2008 and first demonstrated the effect in a ferroelectric crystal in 2011.

The new study shows how negative capacitance can be achieved in an engineered crystal composed of a layered stack of hafnia and zirconia that is readily compatible with advanced silicon transistors. By incorporating the material into model transistors, the study shows how the negative capacitance effect can significantly reduce the voltage required to drive transistors, and therefore a computer’s power consumption.

“Over the past 10 years, the energy consumed by computers has grown exponentially and is already accounting for single-digit percentages of global energy production, which is only growing linearly with no end in sight,” Salahuddin said. “Usually, when we use our computers and mobile phones, we don’t think about how much energy we use. But it’s a huge amount and it’s only going to increase. Our goal is to reduce the energy requirements of this basic building block of computer technology, as this lowers the energy requirements of the entire system.”

Bringing negative capacitance into real technology

Modern laptops and smartphones contain tens of billions of tiny silicon transistors, each of which must be controlled by applying a voltage. The gate oxide is a thin layer of material that converts the applied voltage into an electrical charge, which then turns the transistor on.

Negative capacitance can increase the performance of the gate oxide by reducing the amount of voltage required to achieve a given electrical charge. But the effect cannot be achieved in every material. Creating negative capacitance requires careful manipulation of a material property called ferroelectricity, which occurs when a material exhibits a spontaneous electric field. So far, the effect has only been achieved in ferroelectric materials, so-called perovskites, whose crystal structure is not compatible with silicon.

In the study, the team showed that negative capacitance can also be achieved by combining hafnium oxide and zirconium oxide in an artificial crystal structure called a superlattice, resulting in simultaneous ferroelectricity and antiferroelectricity.

“We found that this combination actually gives us an even better negative capacitance effect, showing that this negative capacitance phenomenon is much broader than originally thought,” said Suraj Cheema, co-first author of the study, a postdoctoral researcher at UC Berkeley. “Negative capacitance does not only appear in the conventional picture of a ferroelectric with a dielectric as has been studied over the last decade. You can even enhance the effect by engineering these crystal structures to use antiferroelectricity together with ferroelectricity.”

The researchers found that a superlattice structure consisting of three atomic layers of zirconium oxide sandwiched between two individual atomic layers of hafnia and a total thickness of less than two nanometers provides the best negative capacitance effect. Because most modern silicon transistors already use a 2-nanometer gate oxide consisting of hafnium oxide on silicon dioxide, and because zirconia is also used in silicon technologies, these superlattice structures can be easily integrated into advanced transistors.

To test how well the superlattice structure would perform as a gate oxide, the team fabricated short-channel transistors and tested their capabilities. These transistors would draw about 30% less voltage compared to existing transistors while meeting semiconductor industry benchmarks without sacrificing reliability.

“One of the problems we often see with this type of research is that we can demonstrate different phenomena in materials, but these materials are not compatible with advanced computational materials and therefore we cannot take the benefit to real technology,” says called Salahuddin. “This work transforms negative capacitance from an academic topic into something that could actually be used in an advanced transistor.

Nirmaan Shanker from UC Berkeley is also co-first author of this study. Other co-authors are Li-Chen Wang, Cheng-Hsiang Hsu, Shang-Lin Hsu, Yu-Hung Liao, Wenshen Li, Jong-Ho Bae, Steve K. Volkman, Daewoong Kwon, Yoonsoo Rho, Costas P. Grigoropoulos, Ramamoorthy Ramesh and Chenming Hu from UC Berkeley; Matthew San Jose, Jorge Gomez, Wriddhi Chakraborty, Patrick Fay and Suman Datta from the University of Notre Dame; Gianni Pinelli, Ravi Rastogi, Dominick Pipitone, Corey Stull, Matthew Cook, Brian Tyrrell, and Mohamed Mohamed of Massachusetts Institute of Technology’s Lincoln Laboratory; Vladimir A Stoica of Pennsylvania State University; Zhan Zhang and John W. Freeland of Argonne National Laboratory; Christopher J. Tassone and Apurva Mehta of SLAC National Accelerator Laboratory; Ghazal Saheli and David Thompson of Applied Materials; SK Hynix’s Dong Ik Suh and Won-Tae Koo; Kab-Jin Nam, Dong Jin Jung, Woo-Bin Song, Seunggeol Nam and Jinseong Heo from Samsung Electronics; Chung-Hsun Lin of Intel Corporation; Narendra Pariha and Souvik Mahapatra from the Indian Institute of Technology; and Padraic Shafer and Jim Ciston of Lawrence Berkeley National Laboratory.

This research was supported in part by the Berkeley Center for Negative Capacitance Transistors (BCNCT), the DARPA Technologies for Mixed-mode Ultra Scaled Integrated Circuits (T-MUSIC) program, and the University of California’s Multicampus Research Programs and Initiatives (UC MRPI) project and the US Department of Energy, Office of Science, Office of Basic Energy Sciences, Materials Sciences and Engineering Division under Contract No. DE-AC02-05-CH11231 (Microelectronics Co-Design program).


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